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New Method Can Squeeze Many More Features into Limited Wafer Space

Written by: 
Renee Meiller, Director of communications, University of Wisconsin-Madison College of Engineering
Scanning electron micrographs of block copolymer films assembled on graphene/germanium chemical patterns with 90 degree bends (left side) and with density multiplication by a factor of 10 (right side). The black dotted lines (right side) indicate the period of the graphene/germanium chemical pattern, in which the period of the assembled block copolymer is reduced by a factor of 10 due to density multiplication. The scale bars are 200 nm.
Scanning electron micrographs of block copolymer films assembled on graphene/germanium chemical patterns with 90 degree bends (left side) and with density multiplication by a factor of 10 (right side). The black dotted lines (right side) indicate the period of the graphene/germanium chemical pattern, in which the period of the assembled block copolymer is reduced by a factor of 10 due to density multiplication. The scale bars are 200 nm.

Manufacturers continuously strive to pack more transistors on a tiny computer chip—yet as the size of these transistors approaches the atomic scale, there are physical limits on how small they are able to make the patterns for the circuitry.

Now, however, taking advantage of a germanium wafer coated with a virtually pristine, one-atom-thick layer of graphene, a team of engineers from the University of Wisconsin-Madison and University of Chicago has devised a simpler, reproducible and less expensive approach for directed self-assembly—a large-scale nanopatterning technique that can increase the density of these patterns.

Included in the International Technology Roadmap for Semiconductors, directed self-assembly is a promising alternative that circumvents some limitations of conventional lithographic processes for patterning semiconductor wafers.

The team—electrical engineer Zhenqiang “Jack” Ma and materials engineer Michael Arnold of UW-Madison and chemical engineer Paul Nealey of Chicago, and their students—published details of its advance in the Aug. 16, 2016, edition of the Nature journal Scientific Reports.

The advance could mean, for example, a boost in functionality for semiconductor electronics and in capacity for high-density magnetic storage.

To achieve the incredibly tiny size scale required for the circuitry in future semiconductor electronics, manufacturers are developing directed self-assembly—an alternative technique that enables them to fabricate intricate, perfectly ordered polymer patterns for the circuitry on semiconductor wafers. The technique enables them to combine traditional “top-down” lithographic methods with “bottom-up” block copolymer self-assembly and offers a promising route for large-scale nanopatterning at significantly reduced cost.

Essentially, for directed self-assembly, they use conventional techniques to define a chemical pre-pattern; when chains of molecules known as a block copolymers self-assemble on the pre-pattern, they follow the pattern to form rationally designed, well ordered features.

The researchers’ new method is much faster and reduces the number of steps in the process to just two: lithography and plasma etching.

In the first demonstration of their technique, the researchers used electron beam lithography and a mild plasma etching technique to pattern one-atom-thick graphene stripes on a germanium wafer. Then they spin-coated the wafer with a common block copolymer—polystyrene-block-poly(methyl methacrylate)—and heated it briefly to direct its self-assembly.

The block copolymer self-assembled completely in just 10 minutes—compared to 30 minutes using conventional chemical patterns—and with fewer defects. The researchers attribute this rapid assembly to the smooth, rigid, crystalline surfaces of germanium and graphene.

The new method also takes advantage of a phenomenon called density multiplication; essentially, the researchers used electron beam lithography to first create a larger master template with sparse patterns that guide the orientation of their block copolymers. When they directed the block copolymer to self-assemble, it did so in a way that enhanced the resolution of the original template—in this case, by a record-setting factor of 10 (over the previous factor of four).

While the stripe pattern was a simple demonstration of their technique, the researchers also showed it works with more architecturally complex or irregular patterns, including those with abrupt 90-degree bends. “These templates offer an exciting alternative to traditional chemical patterns composed of polymer mats and brushes, as they provide faster assembly kinetics and broaden the processing window, while also offering an inert, mechanically and chemically robust, and uniform template with well defined and sharp material interfaces,” says Nealey.

The novel process increases the capabilities of directed self-assembly from both the top down (wafer-scale uniformity and simpler processing) and from the bottom up (faster assembly and greater density multiplication). “Using this one-atom-thick graphene template has never been done before. It’s a new template to guide the self-assembly of the polymers,” says Ma. “This is mass-production-compatible. We opened the door to even smaller features.”

The researchers are patenting their method through the Wisconsin Alumni Research Foundation. Funding from the U.S. Office of Naval Research, U.S. Department of Energy, U.S. Department of Defense, UW-Madison and the University of Chicago supported their work. Other authors on the paper include Tzu-Hsuan Chang, Robert M. Jacobberger, Solomon Mikael, Dalong Geng and Xudong Wang of UW-Madison, and Shisheng Xiong, Hyo Seon Suh and Chi-Chun Liu of the University of Chicago.

Source: University of Wisconsin-Madison College of Engineering